[Gold, aarch64] Implement some AArch64 relocs.
This CL implemented the following relocs for AArch64 target.
- R_AARCH64_MOVW_UABS_G*
- R_AARCH64_MOVW_SABS_G* relocations
gold/ChangeLog
2016-07-26 Igor Kudrin <ikudrin@accesssoftek.com>
* aarch64-reloc-property.cc (Rvalue_bit_select_impl): New class.
(rvalue_bit_select): Use Rvalue_bit_select_impl.
* aarch64-reloc.def (MOVW_UABS_G0, MOVW_UABS_G0_NC,
MOVW_UABS_G1,
MOVW_UABS_G1_NC, MOVW_UABS_G2, MOVW_UABS_G2_NC, MOVW_UABS_G3,
MOVW_SABS_G0, MOVW_SABS_G1, MOVW_SABS_G2): New relocations.
* aarch64.cc (Target_aarch64::Scan::local): Add cases for new
MOVW_UABS_* and MOVW_SABS_* relocations.
(Target_aarch64::Scan::global): Likewise.
(Target_aarch64::Relocate::relocate): Add cases and handlings
for new MOVW_UABS_* and MOVW_SABS_* relocations.
* testsuite/Makefile.am (aarch64_relocs): New test.
* testsuite/Makefile.in: Regenerate.
* testsuite/aarch64_globals.s: New test source file.
* testsuite/aarch64_relocs.s: Likewise.
* testsuite/aarch64_relocs.sh: New test script.
[Gold, aarch64] Implement some AArch64 relocs.
This CL implemented the following relocs for AArch64 target.
- R_AARCH64_MOVW_UABS_G*
- R_AARCH64_MOVW_SABS_G* relocations
gold/ChangeLog
2016-07-26 Igor Kudrin <ikudrin@accesssoftek.com>
* aarch64-reloc-property.cc (Rvalue_bit_select_impl): New class.
(rvalue_bit_select): Use Rvalue_bit_select_impl.
* aarch64-reloc.def (MOVW_UABS_G0, MOVW_UABS_G0_NC,
MOVW_UABS_G1,
MOVW_UABS_G1_NC, MOVW_UABS_G2, MOVW_UABS_G2_NC, MOVW_UABS_G3,
MOVW_SABS_G0, MOVW_SABS_G1, MOVW_SABS_G2): New relocations.
* aarch64.cc (Target_aarch64::Scan::local): Add cases for new
MOVW_UABS_* and MOVW_SABS_* relocations.
(Target_aarch64::Scan::global): Likewise.
(Target_aarch64::Relocate::relocate): Add cases and handlings
for new MOVW_UABS_* and MOVW_SABS_* relocations.
* testsuite/Makefile.am (aarch64_relocs): New test.
* testsuite/Makefile.in: Regenerate.
* testsuite/aarch64_globals.s: New test source file.
* testsuite/aarch64_relocs.s: Likewise.
* testsuite/aarch64_relocs.sh: New test script.
2010-05-12 Doug Kwan <dougkwan@google.com>
elfcpp/ChangeLog
* arm.h (Tag_FP_arch, Tag_ABI_align_needed, Tag_ABI_align_preserved,
Tag_FP_HP_extension, Tag_MPextension_use_legacy): Rename from
existing tags.
(Tag_undefined40, Tag_undefined41, Tag_MPextension_use,
Tag_undefined43): New tags.
(Targ_VFP_arch, Tag_ABI_align8_needed, TAG_ABI_align8_preserved,
Tag_VFP_HP_extension): Define aliases for backward compatiblity.
gold/ChangeLog
* arm.cc (Target_arm::do_finalize_sections): Create an empty
attributes section only if there no attributes section after merging.
(Target_arm::merge_object_attributes): Move value of
Tag_MPextension_use_legacy to that of Tag_MPextension_use.
Handle Tag_DIV_use and Tag_MPextension_use_legacy.
* testsuite/Makefile.am (check_SCRIPTS): Add arm_attr_merge.sh
(check_DATA): Add arm_attr_merge_6.stdout, arm_attr_merge_6r_stdout
and arm_attr_merge_7.stdout.
(arm_attr_merge_6.stdout, arm_attr_merge_6 arm_attr_merge_6a.o
arm_attr_merge_6b.o, arm_attr_merge_6r.stdout, arm_attr_merge_6r,
arm_attr_merge_7.stdout, arm_attr_merge_7, arm_attr_merge_7a.o,
arm_attr_merge_7b.o): New rules.
(MOSTLYCLEANFILES): Add arm_attr_merge_6, arm_attr_merge_6r and
arm_attr_merge_7
* testsuite/Makefile.in: Regenerate.
* testsuite/arm_attr_merge.sh: New file.
* testsuite/arm_attr_merge_[67][ab].s: Same.
2010-05-12 Doug Kwan <dougkwan@google.com>
elfcpp/ChangeLog
* arm.h (Tag_FP_arch, Tag_ABI_align_needed, Tag_ABI_align_preserved,
Tag_FP_HP_extension, Tag_MPextension_use_legacy): Rename from
existing tags.
(Tag_undefined40, Tag_undefined41, Tag_MPextension_use,
Tag_undefined43): New tags.
(Targ_VFP_arch, Tag_ABI_align8_needed, TAG_ABI_align8_preserved,
Tag_VFP_HP_extension): Define aliases for backward compatiblity.
gold/ChangeLog
* arm.cc (Target_arm::do_finalize_sections): Create an empty
attributes section only if there no attributes section after merging.
(Target_arm::merge_object_attributes): Move value of
Tag_MPextension_use_legacy to that of Tag_MPextension_use.
Handle Tag_DIV_use and Tag_MPextension_use_legacy.
* testsuite/Makefile.am (check_SCRIPTS): Add arm_attr_merge.sh
(check_DATA): Add arm_attr_merge_6.stdout, arm_attr_merge_6r_stdout
and arm_attr_merge_7.stdout.
(arm_attr_merge_6.stdout, arm_attr_merge_6 arm_attr_merge_6a.o
arm_attr_merge_6b.o, arm_attr_merge_6r.stdout, arm_attr_merge_6r,
arm_attr_merge_7.stdout, arm_attr_merge_7, arm_attr_merge_7a.o,
arm_attr_merge_7b.o): New rules.
(MOSTLYCLEANFILES): Add arm_attr_merge_6, arm_attr_merge_6r and
arm_attr_merge_7
* testsuite/Makefile.in: Regenerate.
* testsuite/arm_attr_merge.sh: New file.
* testsuite/arm_attr_merge_[67][ab].s: Same.
2010-05-12 Doug Kwan <dougkwan@google.com>
elfcpp/ChangeLog
* arm.h (Tag_FP_arch, Tag_ABI_align_needed, Tag_ABI_align_preserved,
Tag_FP_HP_extension, Tag_MPextension_use_legacy): Rename from
existing tags.
(Tag_undefined40, Tag_undefined41, Tag_MPextension_use,
Tag_undefined43): New tags.
(Targ_VFP_arch, Tag_ABI_align8_needed, TAG_ABI_align8_preserved,
Tag_VFP_HP_extension): Define aliases for backward compatiblity.
gold/ChangeLog
* arm.cc (Target_arm::do_finalize_sections): Create an empty
attributes section only if there no attributes section after merging.
(Target_arm::merge_object_attributes): Move value of
Tag_MPextension_use_legacy to that of Tag_MPextension_use.
Handle Tag_DIV_use and Tag_MPextension_use_legacy.
* testsuite/Makefile.am (check_SCRIPTS): Add arm_attr_merge.sh
(check_DATA): Add arm_attr_merge_6.stdout, arm_attr_merge_6r_stdout
and arm_attr_merge_7.stdout.
(arm_attr_merge_6.stdout, arm_attr_merge_6 arm_attr_merge_6a.o
arm_attr_merge_6b.o, arm_attr_merge_6r.stdout, arm_attr_merge_6r,
arm_attr_merge_7.stdout, arm_attr_merge_7, arm_attr_merge_7a.o,
arm_attr_merge_7b.o): New rules.
(MOSTLYCLEANFILES): Add arm_attr_merge_6, arm_attr_merge_6r and
arm_attr_merge_7
* testsuite/Makefile.in: Regenerate.
* testsuite/arm_attr_merge.sh: New file.
* testsuite/arm_attr_merge_[67][ab].s: Same.
2010-05-12 Doug Kwan <dougkwan@google.com>
elfcpp/ChangeLog
* arm.h (Tag_FP_arch, Tag_ABI_align_needed, Tag_ABI_align_preserved,
Tag_FP_HP_extension, Tag_MPextension_use_legacy): Rename from
existing tags.
(Tag_undefined40, Tag_undefined41, Tag_MPextension_use,
Tag_undefined43): New tags.
(Targ_VFP_arch, Tag_ABI_align8_needed, TAG_ABI_align8_preserved,
Tag_VFP_HP_extension): Define aliases for backward compatiblity.
gold/ChangeLog
* arm.cc (Target_arm::do_finalize_sections): Create an empty
attributes section only if there no attributes section after merging.
(Target_arm::merge_object_attributes): Move value of
Tag_MPextension_use_legacy to that of Tag_MPextension_use.
Handle Tag_DIV_use and Tag_MPextension_use_legacy.
* testsuite/Makefile.am (check_SCRIPTS): Add arm_attr_merge.sh
(check_DATA): Add arm_attr_merge_6.stdout, arm_attr_merge_6r_stdout
and arm_attr_merge_7.stdout.
(arm_attr_merge_6.stdout, arm_attr_merge_6 arm_attr_merge_6a.o
arm_attr_merge_6b.o, arm_attr_merge_6r.stdout, arm_attr_merge_6r,
arm_attr_merge_7.stdout, arm_attr_merge_7, arm_attr_merge_7a.o,
arm_attr_merge_7b.o): New rules.
(MOSTLYCLEANFILES): Add arm_attr_merge_6, arm_attr_merge_6r and
arm_attr_merge_7
* testsuite/Makefile.in: Regenerate.
* testsuite/arm_attr_merge.sh: New file.
* testsuite/arm_attr_merge_[67][ab].s: Same.
2010-02-21 Doug Kwan <dougkwan@google.com>
* arm.cc (Arm_relocate_functions::arm_branch_common): Fix bug in
handling of the maximum backward branch offset.
(Arm_relocate_functions::thumb_branch_common): Ditto.
* testsuite/Makefile.am (check_SCRIPTS): Add arm_branch_in_range.sh.
(check_DATA): Add arm_bl_in_range.stdout, arm_bl_out_of_range.stdout
thumb_bl_in_range.stdout, thumb_bl_out_of_range.stdout,
thumb2_bl_in_range.stdout and thumb2_bl_out_of_range.stdout.
(arm_bl_in_range.stdout, arm_bl_in_range, arm_bl_in_range.o,
arm_bl_out_of_range.stdout, arm_bl_out_of_range,
arm_bl_out_of_range.o, thumb_bl_in_range.stdout, thumb_bl_in_range,
thumb_bl_in_range.o, thumb_bl_out_of_range.stdout,
thumb_bl_out_of_range thumb_bl_out_of_range.o,
thumb2_bl_in_range.stdout, thumb2_bl_in_range, thumb2_bl_in_range.o
thumb2_bl_out_of_range.stdout, thumb2_bl_out_of_range,
thumb2_bl_out_of_range.o): New rules.
(MOSTLYCLEANFILES): Add arm_bl_in_range, arm_bl_out_of_range,
thumb_bl_in_range, thumb_bl_out_of_range, thumb2_bl_in_range and
thumb2_bl_out_of_range
* testsuite/Makefile.in: Regenerate.
* testsuite/arm_bl_in_range.s: New file.
* testsuite/arm_bl_out_of_range.s: Ditto.
* testsuite/arm_branch_in_range.sh: Ditto.
* testsuite/arm_branch_range.t: Ditto.
* testsuite/thumb2_branch_range.t: Ditto.
* testsuite/thumb_bl_in_range.s: Ditto.
* testsuite/thumb_bl_out_of_range.s: Ditto.
* testsuite/thumb_branch_range.t: Ditto.
Fix --defsym to copy symbol attributes.
Alan Modra committed a patch to Gnu ld to fix a problem encountered on
PPC where the --defsym option wasn't copying the st_other bits to the
newly-defined symbol.
https://sourceware.org/ml/binutils/2014-07/msg00094.html
Gold has the same problem, and additionally wasn't copying the symbol type.
This patch fixes both problems, by copying the symbol type, visibility, and
the remaining st_other bits to the new symbol for --defsym=sym1=sym2
assignments.
gold/
* expression.cc (struct Expression::Expression_eval_info): Add
new fields type_pointer, vis_pointer, and nonvis_pointer.
(Expression::eval_maybe_dot): Add type_pointer, vis_pointer, and
nonvis_pointer parameters. Adjust all calls.
(Symbol_expression::value): Update type, visibility, and nonvis bits
in caller.
* script.cc (Symbol_assignment::sized_finalize): Update type,
visibility, and remaining st_other bits for new symbol.
* script.h: (Expression::eval_maybe_dot): Add type_pointer,
vis_pointer, and nonvis_pointer parameters.
* symtab.h (Symbol::set_type): New method.
* testsuite/Makefile.am (defsym_test): New test.
* testsuite/Makefile.in: Regenerate.
* testsuite/defsym_test.c: New file.
* testsuite/defsym_test.sh: New file.
Fix problem where gold cannot build .eh_frame_hdr from ld -r output.
When running ld -r on objects that have comdat groups, when gold
deduplicates a function in a comdat group, it removes the relocations
from the EH information that referred to the dropped copy of the function.
When running a final link using the result of the -r link, the missing
relocation cause it to fail to recognize the FDE for the dropped
function.
This patch improves gold's FDE scanning to take into account the
possibility that an FDE corresponds to a dropped function, and drops
that FDE as well.
Gnu ld, on the other hand, leaves the relocations in the ld -r output,
but makes them R_NONE with an r_sym field of 0. This was sufficient to
let both linkers recognize the FDE properly.
With this fix, if you do an ld -r with gold, then do the final link with
Gnu ld, the .eh_frame_hdr section will not be generated. To make it work
with Gnu ld, we would have to leave the R_NONE relocations in, but I
think it's better to drop the relocations entirely. I'd hope that if
you're doing a -r link with gold, you'll also do the final link with
gold.
gold/
PR gold/19002
* ehframe.cc (Eh_frame::read_fde): Check for dropped functions.
* testsuite/Makefile.am (eh_test_2): New test.
* testsuite/Makefile.in: Regenerate.
* testsuite/eh_test_2.sh: New test script.
* testsuite/eh_test_a.cc (bar): Make it comdat.
* testsuite/eh_test_b.cc (bar): Add a duplicate copy.
Fix problem where gold cannot build .eh_frame_hdr from ld -r output.
When running ld -r on objects that have comdat groups, when gold
deduplicates a function in a comdat group, it removes the relocations
from the EH information that referred to the dropped copy of the function.
When running a final link using the result of the -r link, the missing
relocation cause it to fail to recognize the FDE for the dropped
function.
This patch improves gold's FDE scanning to take into account the
possibility that an FDE corresponds to a dropped function, and drops
that FDE as well.
Gnu ld, on the other hand, leaves the relocations in the ld -r output,
but makes them R_NONE with an r_sym field of 0. This was sufficient to
let both linkers recognize the FDE properly.
With this fix, if you do an ld -r with gold, then do the final link with
Gnu ld, the .eh_frame_hdr section will not be generated. To make it work
with Gnu ld, we would have to leave the R_NONE relocations in, but I
think it's better to drop the relocations entirely. I'd hope that if
you're doing a -r link with gold, you'll also do the final link with
gold.
gold/
PR gold/19002
* ehframe.cc (Eh_frame::read_fde): Check for dropped functions.
* testsuite/Makefile.am (eh_test_2): New test.
* testsuite/Makefile.in: Regenerate.
* testsuite/eh_test_2.sh: New test script.
* testsuite/eh_test_a.cc (bar): Make it comdat.
* testsuite/eh_test_b.cc (bar): Add a duplicate copy.
PR gold/12372
* target.h (Target::plt_address_for_global): New function.
(Target::plt_address_for_local): New function.
(Target::plt_section_for_global): Remove.
(Target::plt_section_for_local): Remove.
(Target::do_plt_address_for_global): New virtual function.
(Target::do_plt_address_for_local): New virtual function.
(Target::do_plt_section_for_global): Remove.
(Target::do_plt_section_for_local): Remove.
(Target::register_global_plt_entry): Add Symbol_table and Layout
parameters.
* output.cc (Output_data_got::Got_entry::write): Use
plt_address_for_global and plt_address_for_local.
* layout.cc (Layout::add_target_dynamic_tags): Use size and
address of output section.
* i386.cc (class Output_data_plt_i386): Add irelative_rel_,
got_irelative_, and irelative_count_ fields. Update
declarations.
(Output_data_plt_i386::has_irelative_section): New function.
(Output_data_plt_i386::entry_count): Add irelative_count_.
(Output_data_plt_i386::set_final_data_size): Likewise.
(class Target_i386): Add got_irelative_ and rel_irelative_
fields. Update declarations.
(Target_i386::Target_i386): Initialize new fields.
(Target_i386::do_plt_address_for_global): New function replacing
do_plt_section_for_global.
(Target_i386::do_plt_address_for_local): New function replacing
do_plt_section_for_local.
(Target_i386::got_section): Create got_irelative_.
(Target_i386::rel_irelative_section): New function.
(Output_data_plt_i386::Output_data_plt_i386): Initialize new
fields. Don't define __rel_iplt_{start,end}.
(Output_data_plt_i386::add_entry): Add symtab and layout
parameters. Change all callers. Use different PLT and GOT for
IFUNC symbols.
(Output_data_plt_i386::add_local_ifunc_entry): Add symtab and
layout parameters. Change all callers. Use different PLT and
GOT.
(Output_data_plt_i386::rel_tls_desc): Fix formatting.
(Output_data_plt_i386::rel_irelative): New function.
(Output_data_plt_i386::address_for_global): New function.
(Output_data_plt_i386::address_for_local): New function.
(Output_data_plt_i386::do_write): Write out IRELATIVE area. Use
IRELATIVE GOT when changing IFUNC GOT entries.
(Target_i386::Scan::global): Use IRELATIVE GOT for IRELATIVE
reloc.
(Target_i386::do_finalize_sections): Create the __rel_iplt symbols
if we didn't create an IRELATIVE GOT.
(Target_i386::Relocate::relocate): Use plt_address_for_global and
plt_address_for_local.
(Target_i386::do_dynsym_value): Use plt_address_for_global.
* x86_64.cc (class Output_data_plt_x86_64): Add irelative_rel_,
got_irelative_, and irelative_count_ fields. Update
declarations.
(Output_data_plt_x86_64::Output_data_plt_x86_64) [both versions]:
Initialize new fields. Remove symtab parameter. Change all
callers.
(Output_data_plt_x86_64::get_tlsdesc_plt_offset): Add
irelative_count_.
(Output_data_plt_x86_64::has_irelative_section): New function.
(Output_data_plt_x86_64::entry_count): Add irelative_count_.
(class Target_x86_64): Add got_irelative_ and rel_irelative_
fields. Update declarations.
(Target_x86_64::Target_x86_64): Initialize new fields.
(Target_x86_64::do_plt_address_for_global): New function replacing
do_plt_section_for_global.
(Target_x86_64::do_plt_address_for_local): New function replacing
do_plt_section_for_local.
(Target_x86_64::got_section): Create got_irelative_.
(Target_x86_64::rela_irelative_section): New function.
(Output_data_plt_x86_64::init): Remove symtab parameter. Change
all callers. Don't create __rel_iplt_{start,end}.
(Output_data_plt_x86_64::add_entry): Add symtab and layout
parameters. Change all callers. Use different PLT and GOT for
IFUNC symbols.
(Output_data_plt_x86_64::add_local_ifunc_entry): Add symtab and
layout parameters. Change all callers. Use different PLT and
GOT.
(Output_data_plt_x86_64::add_relocation): Add symtab and layout
parameters. Change all callers. Use different PLT and GOT for
IFUNC symbols.
(Output_data_plt_x86_64::rela_tlsdesc): Fix formatting.
(Output_data_plt_x86_64::rela_irelative): New function.
(Output_data_plt_x86_64::address_for_global): New function.
(Output_data_plt_x86_64::address_for_local): New function.
(Output_data_plt_x86_64::set_final_data_size): Likewise.
(Output_data_plt_x86_64::do_write): Write out IRELATIVE area.
(Target_x86_64::init_got_plt_for_update): Create got_irelative_.
(Target_x86_64::register_global_plt_entry): Add symtab and layout
parameters.
(Target_x86_64::Scan::global): Use IRELATIVE GOT for IRELATIVE
reloc.
(Target_x86_64::do_finalize_sections): Create the __rela_iplt
symbols if we didn't create an IRELATIVE GOT.
(Target_x86_64::Relocate::relocate): Use plt_address_for_global and
plt_address_for_local.
(Target_x86_64::do_dynsym_value): Use plt_address_for_global.
* testsuite/ifuncvar1.c: New test file.
* testsuite/ifuncvar2.c: New test file.
* testsuite/ifuncvar3.c: New test file.
* testsuite/Makefile.am (check_PROGRAMS): Add ifuncvar.
(ifuncvar1_pic.o, ifuncvar2_pic.o, ifuncvar.so): New targets.
(ifuncvar_SOURCES, ifuncvar_DEPENDENCIES): New variables.
(ifuncvar_LDFLAGS, ifuncvar_LDADD): New variables.
* testsuite/Makefile.in: Rebuild.
PR gold/12372
* target.h (Target::plt_address_for_global): New function.
(Target::plt_address_for_local): New function.
(Target::plt_section_for_global): Remove.
(Target::plt_section_for_local): Remove.
(Target::do_plt_address_for_global): New virtual function.
(Target::do_plt_address_for_local): New virtual function.
(Target::do_plt_section_for_global): Remove.
(Target::do_plt_section_for_local): Remove.
(Target::register_global_plt_entry): Add Symbol_table and Layout
parameters.
* output.cc (Output_data_got::Got_entry::write): Use
plt_address_for_global and plt_address_for_local.
* layout.cc (Layout::add_target_dynamic_tags): Use size and
address of output section.
* i386.cc (class Output_data_plt_i386): Add irelative_rel_,
got_irelative_, and irelative_count_ fields. Update
declarations.
(Output_data_plt_i386::has_irelative_section): New function.
(Output_data_plt_i386::entry_count): Add irelative_count_.
(Output_data_plt_i386::set_final_data_size): Likewise.
(class Target_i386): Add got_irelative_ and rel_irelative_
fields. Update declarations.
(Target_i386::Target_i386): Initialize new fields.
(Target_i386::do_plt_address_for_global): New function replacing
do_plt_section_for_global.
(Target_i386::do_plt_address_for_local): New function replacing
do_plt_section_for_local.
(Target_i386::got_section): Create got_irelative_.
(Target_i386::rel_irelative_section): New function.
(Output_data_plt_i386::Output_data_plt_i386): Initialize new
fields. Don't define __rel_iplt_{start,end}.
(Output_data_plt_i386::add_entry): Add symtab and layout
parameters. Change all callers. Use different PLT and GOT for
IFUNC symbols.
(Output_data_plt_i386::add_local_ifunc_entry): Add symtab and
layout parameters. Change all callers. Use different PLT and
GOT.
(Output_data_plt_i386::rel_tls_desc): Fix formatting.
(Output_data_plt_i386::rel_irelative): New function.
(Output_data_plt_i386::address_for_global): New function.
(Output_data_plt_i386::address_for_local): New function.
(Output_data_plt_i386::do_write): Write out IRELATIVE area. Use
IRELATIVE GOT when changing IFUNC GOT entries.
(Target_i386::Scan::global): Use IRELATIVE GOT for IRELATIVE
reloc.
(Target_i386::do_finalize_sections): Create the __rel_iplt symbols
if we didn't create an IRELATIVE GOT.
(Target_i386::Relocate::relocate): Use plt_address_for_global and
plt_address_for_local.
(Target_i386::do_dynsym_value): Use plt_address_for_global.
* x86_64.cc (class Output_data_plt_x86_64): Add irelative_rel_,
got_irelative_, and irelative_count_ fields. Update
declarations.
(Output_data_plt_x86_64::Output_data_plt_x86_64) [both versions]:
Initialize new fields. Remove symtab parameter. Change all
callers.
(Output_data_plt_x86_64::get_tlsdesc_plt_offset): Add
irelative_count_.
(Output_data_plt_x86_64::has_irelative_section): New function.
(Output_data_plt_x86_64::entry_count): Add irelative_count_.
(class Target_x86_64): Add got_irelative_ and rel_irelative_
fields. Update declarations.
(Target_x86_64::Target_x86_64): Initialize new fields.
(Target_x86_64::do_plt_address_for_global): New function replacing
do_plt_section_for_global.
(Target_x86_64::do_plt_address_for_local): New function replacing
do_plt_section_for_local.
(Target_x86_64::got_section): Create got_irelative_.
(Target_x86_64::rela_irelative_section): New function.
(Output_data_plt_x86_64::init): Remove symtab parameter. Change
all callers. Don't create __rel_iplt_{start,end}.
(Output_data_plt_x86_64::add_entry): Add symtab and layout
parameters. Change all callers. Use different PLT and GOT for
IFUNC symbols.
(Output_data_plt_x86_64::add_local_ifunc_entry): Add symtab and
layout parameters. Change all callers. Use different PLT and
GOT.
(Output_data_plt_x86_64::add_relocation): Add symtab and layout
parameters. Change all callers. Use different PLT and GOT for
IFUNC symbols.
(Output_data_plt_x86_64::rela_tlsdesc): Fix formatting.
(Output_data_plt_x86_64::rela_irelative): New function.
(Output_data_plt_x86_64::address_for_global): New function.
(Output_data_plt_x86_64::address_for_local): New function.
(Output_data_plt_x86_64::set_final_data_size): Likewise.
(Output_data_plt_x86_64::do_write): Write out IRELATIVE area.
(Target_x86_64::init_got_plt_for_update): Create got_irelative_.
(Target_x86_64::register_global_plt_entry): Add symtab and layout
parameters.
(Target_x86_64::Scan::global): Use IRELATIVE GOT for IRELATIVE
reloc.
(Target_x86_64::do_finalize_sections): Create the __rela_iplt
symbols if we didn't create an IRELATIVE GOT.
(Target_x86_64::Relocate::relocate): Use plt_address_for_global and
plt_address_for_local.
(Target_x86_64::do_dynsym_value): Use plt_address_for_global.
* testsuite/ifuncvar1.c: New test file.
* testsuite/ifuncvar2.c: New test file.
* testsuite/ifuncvar3.c: New test file.
* testsuite/Makefile.am (check_PROGRAMS): Add ifuncvar.
(ifuncvar1_pic.o, ifuncvar2_pic.o, ifuncvar.so): New targets.
(ifuncvar_SOURCES, ifuncvar_DEPENDENCIES): New variables.
(ifuncvar_LDFLAGS, ifuncvar_LDADD): New variables.
* testsuite/Makefile.in: Rebuild.
PR gold/12372
* target.h (Target::plt_address_for_global): New function.
(Target::plt_address_for_local): New function.
(Target::plt_section_for_global): Remove.
(Target::plt_section_for_local): Remove.
(Target::do_plt_address_for_global): New virtual function.
(Target::do_plt_address_for_local): New virtual function.
(Target::do_plt_section_for_global): Remove.
(Target::do_plt_section_for_local): Remove.
(Target::register_global_plt_entry): Add Symbol_table and Layout
parameters.
* output.cc (Output_data_got::Got_entry::write): Use
plt_address_for_global and plt_address_for_local.
* layout.cc (Layout::add_target_dynamic_tags): Use size and
address of output section.
* i386.cc (class Output_data_plt_i386): Add irelative_rel_,
got_irelative_, and irelative_count_ fields. Update
declarations.
(Output_data_plt_i386::has_irelative_section): New function.
(Output_data_plt_i386::entry_count): Add irelative_count_.
(Output_data_plt_i386::set_final_data_size): Likewise.
(class Target_i386): Add got_irelative_ and rel_irelative_
fields. Update declarations.
(Target_i386::Target_i386): Initialize new fields.
(Target_i386::do_plt_address_for_global): New function replacing
do_plt_section_for_global.
(Target_i386::do_plt_address_for_local): New function replacing
do_plt_section_for_local.
(Target_i386::got_section): Create got_irelative_.
(Target_i386::rel_irelative_section): New function.
(Output_data_plt_i386::Output_data_plt_i386): Initialize new
fields. Don't define __rel_iplt_{start,end}.
(Output_data_plt_i386::add_entry): Add symtab and layout
parameters. Change all callers. Use different PLT and GOT for
IFUNC symbols.
(Output_data_plt_i386::add_local_ifunc_entry): Add symtab and
layout parameters. Change all callers. Use different PLT and
GOT.
(Output_data_plt_i386::rel_tls_desc): Fix formatting.
(Output_data_plt_i386::rel_irelative): New function.
(Output_data_plt_i386::address_for_global): New function.
(Output_data_plt_i386::address_for_local): New function.
(Output_data_plt_i386::do_write): Write out IRELATIVE area. Use
IRELATIVE GOT when changing IFUNC GOT entries.
(Target_i386::Scan::global): Use IRELATIVE GOT for IRELATIVE
reloc.
(Target_i386::do_finalize_sections): Create the __rel_iplt symbols
if we didn't create an IRELATIVE GOT.
(Target_i386::Relocate::relocate): Use plt_address_for_global and
plt_address_for_local.
(Target_i386::do_dynsym_value): Use plt_address_for_global.
* x86_64.cc (class Output_data_plt_x86_64): Add irelative_rel_,
got_irelative_, and irelative_count_ fields. Update
declarations.
(Output_data_plt_x86_64::Output_data_plt_x86_64) [both versions]:
Initialize new fields. Remove symtab parameter. Change all
callers.
(Output_data_plt_x86_64::get_tlsdesc_plt_offset): Add
irelative_count_.
(Output_data_plt_x86_64::has_irelative_section): New function.
(Output_data_plt_x86_64::entry_count): Add irelative_count_.
(class Target_x86_64): Add got_irelative_ and rel_irelative_
fields. Update declarations.
(Target_x86_64::Target_x86_64): Initialize new fields.
(Target_x86_64::do_plt_address_for_global): New function replacing
do_plt_section_for_global.
(Target_x86_64::do_plt_address_for_local): New function replacing
do_plt_section_for_local.
(Target_x86_64::got_section): Create got_irelative_.
(Target_x86_64::rela_irelative_section): New function.
(Output_data_plt_x86_64::init): Remove symtab parameter. Change
all callers. Don't create __rel_iplt_{start,end}.
(Output_data_plt_x86_64::add_entry): Add symtab and layout
parameters. Change all callers. Use different PLT and GOT for
IFUNC symbols.
(Output_data_plt_x86_64::add_local_ifunc_entry): Add symtab and
layout parameters. Change all callers. Use different PLT and
GOT.
(Output_data_plt_x86_64::add_relocation): Add symtab and layout
parameters. Change all callers. Use different PLT and GOT for
IFUNC symbols.
(Output_data_plt_x86_64::rela_tlsdesc): Fix formatting.
(Output_data_plt_x86_64::rela_irelative): New function.
(Output_data_plt_x86_64::address_for_global): New function.
(Output_data_plt_x86_64::address_for_local): New function.
(Output_data_plt_x86_64::set_final_data_size): Likewise.
(Output_data_plt_x86_64::do_write): Write out IRELATIVE area.
(Target_x86_64::init_got_plt_for_update): Create got_irelative_.
(Target_x86_64::register_global_plt_entry): Add symtab and layout
parameters.
(Target_x86_64::Scan::global): Use IRELATIVE GOT for IRELATIVE
reloc.
(Target_x86_64::do_finalize_sections): Create the __rela_iplt
symbols if we didn't create an IRELATIVE GOT.
(Target_x86_64::Relocate::relocate): Use plt_address_for_global and
plt_address_for_local.
(Target_x86_64::do_dynsym_value): Use plt_address_for_global.
* testsuite/ifuncvar1.c: New test file.
* testsuite/ifuncvar2.c: New test file.
* testsuite/ifuncvar3.c: New test file.
* testsuite/Makefile.am (check_PROGRAMS): Add ifuncvar.
(ifuncvar1_pic.o, ifuncvar2_pic.o, ifuncvar.so): New targets.
(ifuncvar_SOURCES, ifuncvar_DEPENDENCIES): New variables.
(ifuncvar_LDFLAGS, ifuncvar_LDADD): New variables.
* testsuite/Makefile.in: Rebuild.
gold: Support x86-64 TLS code sequences without PLT
There are extensions to x86-64 psABI:
https://groups.google.com/forum/#!topic/x86-64-abi/de5_KnLHxtI
to call tls_get_addr via GOT:
call *__tls_get_addr@GOTPCREL(%rip)
Since direct call is 4-byte long and indirect call, is 5-byte long, the
extra one byte must be handled properly.
For general dynamic model, one 0x66 prefix before call instruction is
removed to make room for indirect call. For local dynamic model, we
simply use 5-byte indirect call.
TLS linker optimization is updated to recognize new instruction
patterns. For local dynamic model to local exec model transition, we
generate 4 0x66 prefixes, instead of 3, before mov instruction in 64-bit
and generate a 5-byte nop, instead of 4-byte, before mov instruction in
32-bit.
PR gold/20216
* configure.ac (DEFAULT_TARGET_X86_64_OR_X32): New
AM_CONDITIONAL.
* configure: Regenerated.
* x86_64.cc (Target_x86_64<size>::Relocate::relocate): Allow
R_X86_64_GOTPCRELX relocation against __tls_get_addr.
(Target_x86_64<size>::Relocate::tls_gd_to_ie): Support indirect
call to __tls_get_addr.
(Target_x86_64<size>::Relocate::tls_gd_to_le): Likewise.
(Target_x86_64<size>::Relocate::tls_ld_to_le): Likewise.
* testsuite/Makefile.am (check_PROGRAMS): Add pr20216a_test,
pr20216b_test, pr20216c_test, pr20216d_test, pr20216e_test.
(pr20216a_test_SOURCES): New.
(pr20216a_test_DEPENDENCIES): Likewise.
(pr20216a_test_CFLAGS): Likewise.
(pr20216a_test_LDFLAGS): Likewise.
(pr20216a_test_LDADD): Likewise.
(pr20216b_test_SOURCES): Likewise.
(pr20216b_test_DEPENDENCIES): Likewise.
(pr20216b_test_CFLAGS): Likewise.
(pr20216b_test_LDFLAGS): Likewise.
(pr20216b_test_LDADD): Likewise.
(pr20216c_test_SOURCES): Likewise.
(pr20216c_test_DEPENDENCIES): Likewise.
(pr20216c_test_CFLAGS): Likewise.
(pr20216c_test_LDFLAGS): Likewise.
(pr20216c_test_LDADD): Likewise.
(pr20216d_test_SOURCES): Likewise.
(pr20216d_test_DEPENDENCIES): Likewise.
(pr20216d_test_CFLAGS): Likewise.
(pr20216d_test_LDFLAGS): Likewise.
(pr20216d_test_LDADD): Likewise.
(pr20216e_test_SOURCES): Likewise.
(pr20216e_test_DEPENDENCIES): Likewise.
(pr20216e_test_CFLAGS): Likewise.
(pr20216e_test_LDFLAGS): Likewise.
(pr20216e_test_LDADD): Likewise.
(pr20216a.so): Likewise.
(pr20216b.so): Likewise.
(pr20216_gd.o): Likewise.
(pr20216_ld.o): Likewise.
(MOSTLYCLEANFILES): Add pr20216a.so pr20216b.so.
* testsuite/Makefile.in: Regenerated.
* testsuite/pr20216_def.c: New file.
* testsuite/pr20216_gd.S: Likewise.
* testsuite/pr20216_ld.S: Likewise.
* testsuite/pr20216_main.c: Likewise.
gold: Support x86-64 TLS code sequences without PLT
There are extensions to x86-64 psABI:
https://groups.google.com/forum/#!topic/x86-64-abi/de5_KnLHxtI
to call tls_get_addr via GOT:
call *__tls_get_addr@GOTPCREL(%rip)
Since direct call is 4-byte long and indirect call, is 5-byte long, the
extra one byte must be handled properly.
For general dynamic model, one 0x66 prefix before call instruction is
removed to make room for indirect call. For local dynamic model, we
simply use 5-byte indirect call.
TLS linker optimization is updated to recognize new instruction
patterns. For local dynamic model to local exec model transition, we
generate 4 0x66 prefixes, instead of 3, before mov instruction in 64-bit
and generate a 5-byte nop, instead of 4-byte, before mov instruction in
32-bit.
PR gold/20216
* configure.ac (DEFAULT_TARGET_X86_64_OR_X32): New
AM_CONDITIONAL.
* configure: Regenerated.
* x86_64.cc (Target_x86_64<size>::Relocate::relocate): Allow
R_X86_64_GOTPCRELX relocation against __tls_get_addr.
(Target_x86_64<size>::Relocate::tls_gd_to_ie): Support indirect
call to __tls_get_addr.
(Target_x86_64<size>::Relocate::tls_gd_to_le): Likewise.
(Target_x86_64<size>::Relocate::tls_ld_to_le): Likewise.
* testsuite/Makefile.am (check_PROGRAMS): Add pr20216a_test,
pr20216b_test, pr20216c_test, pr20216d_test, pr20216e_test.
(pr20216a_test_SOURCES): New.
(pr20216a_test_DEPENDENCIES): Likewise.
(pr20216a_test_CFLAGS): Likewise.
(pr20216a_test_LDFLAGS): Likewise.
(pr20216a_test_LDADD): Likewise.
(pr20216b_test_SOURCES): Likewise.
(pr20216b_test_DEPENDENCIES): Likewise.
(pr20216b_test_CFLAGS): Likewise.
(pr20216b_test_LDFLAGS): Likewise.
(pr20216b_test_LDADD): Likewise.
(pr20216c_test_SOURCES): Likewise.
(pr20216c_test_DEPENDENCIES): Likewise.
(pr20216c_test_CFLAGS): Likewise.
(pr20216c_test_LDFLAGS): Likewise.
(pr20216c_test_LDADD): Likewise.
(pr20216d_test_SOURCES): Likewise.
(pr20216d_test_DEPENDENCIES): Likewise.
(pr20216d_test_CFLAGS): Likewise.
(pr20216d_test_LDFLAGS): Likewise.
(pr20216d_test_LDADD): Likewise.
(pr20216e_test_SOURCES): Likewise.
(pr20216e_test_DEPENDENCIES): Likewise.
(pr20216e_test_CFLAGS): Likewise.
(pr20216e_test_LDFLAGS): Likewise.
(pr20216e_test_LDADD): Likewise.
(pr20216a.so): Likewise.
(pr20216b.so): Likewise.
(pr20216_gd.o): Likewise.
(pr20216_ld.o): Likewise.
(MOSTLYCLEANFILES): Add pr20216a.so pr20216b.so.
* testsuite/Makefile.in: Regenerated.
* testsuite/pr20216_def.c: New file.
* testsuite/pr20216_gd.S: Likewise.
* testsuite/pr20216_ld.S: Likewise.
* testsuite/pr20216_main.c: Likewise.
gold: Support x86-64 TLS code sequences without PLT
There are extensions to x86-64 psABI:
https://groups.google.com/forum/#!topic/x86-64-abi/de5_KnLHxtI
to call tls_get_addr via GOT:
call *__tls_get_addr@GOTPCREL(%rip)
Since direct call is 4-byte long and indirect call, is 5-byte long, the
extra one byte must be handled properly.
For general dynamic model, one 0x66 prefix before call instruction is
removed to make room for indirect call. For local dynamic model, we
simply use 5-byte indirect call.
TLS linker optimization is updated to recognize new instruction
patterns. For local dynamic model to local exec model transition, we
generate 4 0x66 prefixes, instead of 3, before mov instruction in 64-bit
and generate a 5-byte nop, instead of 4-byte, before mov instruction in
32-bit.
PR gold/20216
* configure.ac (DEFAULT_TARGET_X86_64_OR_X32): New
AM_CONDITIONAL.
* configure: Regenerated.
* x86_64.cc (Target_x86_64<size>::Relocate::relocate): Allow
R_X86_64_GOTPCRELX relocation against __tls_get_addr.
(Target_x86_64<size>::Relocate::tls_gd_to_ie): Support indirect
call to __tls_get_addr.
(Target_x86_64<size>::Relocate::tls_gd_to_le): Likewise.
(Target_x86_64<size>::Relocate::tls_ld_to_le): Likewise.
* testsuite/Makefile.am (check_PROGRAMS): Add pr20216a_test,
pr20216b_test, pr20216c_test, pr20216d_test, pr20216e_test.
(pr20216a_test_SOURCES): New.
(pr20216a_test_DEPENDENCIES): Likewise.
(pr20216a_test_CFLAGS): Likewise.
(pr20216a_test_LDFLAGS): Likewise.
(pr20216a_test_LDADD): Likewise.
(pr20216b_test_SOURCES): Likewise.
(pr20216b_test_DEPENDENCIES): Likewise.
(pr20216b_test_CFLAGS): Likewise.
(pr20216b_test_LDFLAGS): Likewise.
(pr20216b_test_LDADD): Likewise.
(pr20216c_test_SOURCES): Likewise.
(pr20216c_test_DEPENDENCIES): Likewise.
(pr20216c_test_CFLAGS): Likewise.
(pr20216c_test_LDFLAGS): Likewise.
(pr20216c_test_LDADD): Likewise.
(pr20216d_test_SOURCES): Likewise.
(pr20216d_test_DEPENDENCIES): Likewise.
(pr20216d_test_CFLAGS): Likewise.
(pr20216d_test_LDFLAGS): Likewise.
(pr20216d_test_LDADD): Likewise.
(pr20216e_test_SOURCES): Likewise.
(pr20216e_test_DEPENDENCIES): Likewise.
(pr20216e_test_CFLAGS): Likewise.
(pr20216e_test_LDFLAGS): Likewise.
(pr20216e_test_LDADD): Likewise.
(pr20216a.so): Likewise.
(pr20216b.so): Likewise.
(pr20216_gd.o): Likewise.
(pr20216_ld.o): Likewise.
(MOSTLYCLEANFILES): Add pr20216a.so pr20216b.so.
* testsuite/Makefile.in: Regenerated.
* testsuite/pr20216_def.c: New file.
* testsuite/pr20216_gd.S: Likewise.
* testsuite/pr20216_ld.S: Likewise.
* testsuite/pr20216_main.c: Likewise.
gold: Support x86-64 TLS code sequences without PLT
There are extensions to x86-64 psABI:
https://groups.google.com/forum/#!topic/x86-64-abi/de5_KnLHxtI
to call tls_get_addr via GOT:
call *__tls_get_addr@GOTPCREL(%rip)
Since direct call is 4-byte long and indirect call, is 5-byte long, the
extra one byte must be handled properly.
For general dynamic model, one 0x66 prefix before call instruction is
removed to make room for indirect call. For local dynamic model, we
simply use 5-byte indirect call.
TLS linker optimization is updated to recognize new instruction
patterns. For local dynamic model to local exec model transition, we
generate 4 0x66 prefixes, instead of 3, before mov instruction in 64-bit
and generate a 5-byte nop, instead of 4-byte, before mov instruction in
32-bit.
PR gold/20216
* configure.ac (DEFAULT_TARGET_X86_64_OR_X32): New
AM_CONDITIONAL.
* configure: Regenerated.
* x86_64.cc (Target_x86_64<size>::Relocate::relocate): Allow
R_X86_64_GOTPCRELX relocation against __tls_get_addr.
(Target_x86_64<size>::Relocate::tls_gd_to_ie): Support indirect
call to __tls_get_addr.
(Target_x86_64<size>::Relocate::tls_gd_to_le): Likewise.
(Target_x86_64<size>::Relocate::tls_ld_to_le): Likewise.
* testsuite/Makefile.am (check_PROGRAMS): Add pr20216a_test,
pr20216b_test, pr20216c_test, pr20216d_test, pr20216e_test.
(pr20216a_test_SOURCES): New.
(pr20216a_test_DEPENDENCIES): Likewise.
(pr20216a_test_CFLAGS): Likewise.
(pr20216a_test_LDFLAGS): Likewise.
(pr20216a_test_LDADD): Likewise.
(pr20216b_test_SOURCES): Likewise.
(pr20216b_test_DEPENDENCIES): Likewise.
(pr20216b_test_CFLAGS): Likewise.
(pr20216b_test_LDFLAGS): Likewise.
(pr20216b_test_LDADD): Likewise.
(pr20216c_test_SOURCES): Likewise.
(pr20216c_test_DEPENDENCIES): Likewise.
(pr20216c_test_CFLAGS): Likewise.
(pr20216c_test_LDFLAGS): Likewise.
(pr20216c_test_LDADD): Likewise.
(pr20216d_test_SOURCES): Likewise.
(pr20216d_test_DEPENDENCIES): Likewise.
(pr20216d_test_CFLAGS): Likewise.
(pr20216d_test_LDFLAGS): Likewise.
(pr20216d_test_LDADD): Likewise.
(pr20216e_test_SOURCES): Likewise.
(pr20216e_test_DEPENDENCIES): Likewise.
(pr20216e_test_CFLAGS): Likewise.
(pr20216e_test_LDFLAGS): Likewise.
(pr20216e_test_LDADD): Likewise.
(pr20216a.so): Likewise.
(pr20216b.so): Likewise.
(pr20216_gd.o): Likewise.
(pr20216_ld.o): Likewise.
(MOSTLYCLEANFILES): Add pr20216a.so pr20216b.so.
* testsuite/Makefile.in: Regenerated.
* testsuite/pr20216_def.c: New file.
* testsuite/pr20216_gd.S: Likewise.
* testsuite/pr20216_ld.S: Likewise.
* testsuite/pr20216_main.c: Likewise.
gold: Support 386 TLS code sequences without PLT
There are extensions to 386 psABI:
https://groups.google.com/forum/#!topic/ia32-abi/awsRSvJOJfs
to call tls_get_addr via GOT:
call *___tls_get_addr@GOT(%reg)
where EBX register isn't required as GOT base.
Since direct call is 4-byte long and indirect call, is 5-byte long, the
extra one byte must be handled properly.
For general dynamic model, 7-byte lea instruction before call
instruction is replaced by 6-byte one to make room for indirect call.
For local dynamic model, we simply use 5-byte indirect call.
TLS linker optimization is updated to recognize new instruction
patterns. For local dynamic model to local exec model transition,
we generate a 6-byte lea instruction as nop, instead of a 1-byte nop
plus a 4-byte lea instruction.
PR gold/20308
* i386.cc (Target_i386::Relocate::relocate): Allow
R_386_GOT32X relocation against ___tls_get_addr.
(Target_i386::Relocate::tls_gd_to_ie): Support indirect
call to __tls_get_addr.
(Target_i386::Relocate::tls_gd_to_le): Likewise.
(Target_i386::Relocate::tls_ld_to_le): Likewise.
* testsuite/Makefile.am (check_PROGRAMS): Add pr20308a_test,
pr20308b_test, pr20308c_test, pr20308d_test, pr20308e_test.
(pr20308a_test_SOURCES): New.
(pr20308a_test_DEPENDENCIES): Likewise.
(pr20308a_test_CFLAGS): Likewise.
(pr20308a_test_LDFLAGS): Likewise.
(pr20308a_test_LDADD): Likewise.
(pr20308b_test_SOURCES): Likewise.
(pr20308b_test_DEPENDENCIES): Likewise.
(pr20308b_test_CFLAGS): Likewise.
(pr20308b_test_LDFLAGS): Likewise.
(pr20308b_test_LDADD): Likewise.
(pr20308c_test_SOURCES): Likewise.
(pr20308c_test_DEPENDENCIES): Likewise.
(pr20308c_test_CFLAGS): Likewise.
(pr20308c_test_LDFLAGS): Likewise.
(pr20308c_test_LDADD): Likewise.
(pr20308d_test_SOURCES): Likewise.
(pr20308d_test_DEPENDENCIES): Likewise.
(pr20308d_test_CFLAGS): Likewise.
(pr20308d_test_LDFLAGS): Likewise.
(pr20308d_test_LDADD): Likewise.
(pr20308e_test_SOURCES): Likewise.
(pr20308e_test_DEPENDENCIES): Likewise.
(pr20308e_test_CFLAGS): Likewise.
(pr20308e_test_LDFLAGS): Likewise.
(pr20308e_test_LDADD): Likewise.
(pr20308a.so): Likewise.
(pr20308b.so): Likewise.
(pr20308_gd.o): Likewise.
(pr20308_ld.o): Likewise.
(MOSTLYCLEANFILES): Add pr20308a.so pr20308b.so.
* testsuite/Makefile.in: Regenerated.
* testsuite/pr20308_def.c: New file.
* testsuite/pr20308_gd.S: Likewise.
* testsuite/pr20308_ld.S: Likewise.
* testsuite/pr20308_main.c: Likewise.
gold: Support 386 TLS code sequences without PLT
There are extensions to 386 psABI:
https://groups.google.com/forum/#!topic/ia32-abi/awsRSvJOJfs
to call tls_get_addr via GOT:
call *___tls_get_addr@GOT(%reg)
where EBX register isn't required as GOT base.
Since direct call is 4-byte long and indirect call, is 5-byte long, the
extra one byte must be handled properly.
For general dynamic model, 7-byte lea instruction before call
instruction is replaced by 6-byte one to make room for indirect call.
For local dynamic model, we simply use 5-byte indirect call.
TLS linker optimization is updated to recognize new instruction
patterns. For local dynamic model to local exec model transition,
we generate a 6-byte lea instruction as nop, instead of a 1-byte nop
plus a 4-byte lea instruction.
PR gold/20308
* i386.cc (Target_i386::Relocate::relocate): Allow
R_386_GOT32X relocation against ___tls_get_addr.
(Target_i386::Relocate::tls_gd_to_ie): Support indirect
call to __tls_get_addr.
(Target_i386::Relocate::tls_gd_to_le): Likewise.
(Target_i386::Relocate::tls_ld_to_le): Likewise.
* testsuite/Makefile.am (check_PROGRAMS): Add pr20308a_test,
pr20308b_test, pr20308c_test, pr20308d_test, pr20308e_test.
(pr20308a_test_SOURCES): New.
(pr20308a_test_DEPENDENCIES): Likewise.
(pr20308a_test_CFLAGS): Likewise.
(pr20308a_test_LDFLAGS): Likewise.
(pr20308a_test_LDADD): Likewise.
(pr20308b_test_SOURCES): Likewise.
(pr20308b_test_DEPENDENCIES): Likewise.
(pr20308b_test_CFLAGS): Likewise.
(pr20308b_test_LDFLAGS): Likewise.
(pr20308b_test_LDADD): Likewise.
(pr20308c_test_SOURCES): Likewise.
(pr20308c_test_DEPENDENCIES): Likewise.
(pr20308c_test_CFLAGS): Likewise.
(pr20308c_test_LDFLAGS): Likewise.
(pr20308c_test_LDADD): Likewise.
(pr20308d_test_SOURCES): Likewise.
(pr20308d_test_DEPENDENCIES): Likewise.
(pr20308d_test_CFLAGS): Likewise.
(pr20308d_test_LDFLAGS): Likewise.
(pr20308d_test_LDADD): Likewise.
(pr20308e_test_SOURCES): Likewise.
(pr20308e_test_DEPENDENCIES): Likewise.
(pr20308e_test_CFLAGS): Likewise.
(pr20308e_test_LDFLAGS): Likewise.
(pr20308e_test_LDADD): Likewise.
(pr20308a.so): Likewise.
(pr20308b.so): Likewise.
(pr20308_gd.o): Likewise.
(pr20308_ld.o): Likewise.
(MOSTLYCLEANFILES): Add pr20308a.so pr20308b.so.
* testsuite/Makefile.in: Regenerated.
* testsuite/pr20308_def.c: New file.
* testsuite/pr20308_gd.S: Likewise.
* testsuite/pr20308_ld.S: Likewise.
* testsuite/pr20308_main.c: Likewise.
gold: Support 386 TLS code sequences without PLT
There are extensions to 386 psABI:
https://groups.google.com/forum/#!topic/ia32-abi/awsRSvJOJfs
to call tls_get_addr via GOT:
call *___tls_get_addr@GOT(%reg)
where EBX register isn't required as GOT base.
Since direct call is 4-byte long and indirect call, is 5-byte long, the
extra one byte must be handled properly.
For general dynamic model, 7-byte lea instruction before call
instruction is replaced by 6-byte one to make room for indirect call.
For local dynamic model, we simply use 5-byte indirect call.
TLS linker optimization is updated to recognize new instruction
patterns. For local dynamic model to local exec model transition,
we generate a 6-byte lea instruction as nop, instead of a 1-byte nop
plus a 4-byte lea instruction.
PR gold/20308
* i386.cc (Target_i386::Relocate::relocate): Allow
R_386_GOT32X relocation against ___tls_get_addr.
(Target_i386::Relocate::tls_gd_to_ie): Support indirect
call to __tls_get_addr.
(Target_i386::Relocate::tls_gd_to_le): Likewise.
(Target_i386::Relocate::tls_ld_to_le): Likewise.
* testsuite/Makefile.am (check_PROGRAMS): Add pr20308a_test,
pr20308b_test, pr20308c_test, pr20308d_test, pr20308e_test.
(pr20308a_test_SOURCES): New.
(pr20308a_test_DEPENDENCIES): Likewise.
(pr20308a_test_CFLAGS): Likewise.
(pr20308a_test_LDFLAGS): Likewise.
(pr20308a_test_LDADD): Likewise.
(pr20308b_test_SOURCES): Likewise.
(pr20308b_test_DEPENDENCIES): Likewise.
(pr20308b_test_CFLAGS): Likewise.
(pr20308b_test_LDFLAGS): Likewise.
(pr20308b_test_LDADD): Likewise.
(pr20308c_test_SOURCES): Likewise.
(pr20308c_test_DEPENDENCIES): Likewise.
(pr20308c_test_CFLAGS): Likewise.
(pr20308c_test_LDFLAGS): Likewise.
(pr20308c_test_LDADD): Likewise.
(pr20308d_test_SOURCES): Likewise.
(pr20308d_test_DEPENDENCIES): Likewise.
(pr20308d_test_CFLAGS): Likewise.
(pr20308d_test_LDFLAGS): Likewise.
(pr20308d_test_LDADD): Likewise.
(pr20308e_test_SOURCES): Likewise.
(pr20308e_test_DEPENDENCIES): Likewise.
(pr20308e_test_CFLAGS): Likewise.
(pr20308e_test_LDFLAGS): Likewise.
(pr20308e_test_LDADD): Likewise.
(pr20308a.so): Likewise.
(pr20308b.so): Likewise.
(pr20308_gd.o): Likewise.
(pr20308_ld.o): Likewise.
(MOSTLYCLEANFILES): Add pr20308a.so pr20308b.so.
* testsuite/Makefile.in: Regenerated.
* testsuite/pr20308_def.c: New file.
* testsuite/pr20308_gd.S: Likewise.
* testsuite/pr20308_ld.S: Likewise.
* testsuite/pr20308_main.c: Likewise.
gold: Support 386 TLS code sequences without PLT
There are extensions to 386 psABI:
https://groups.google.com/forum/#!topic/ia32-abi/awsRSvJOJfs
to call tls_get_addr via GOT:
call *___tls_get_addr@GOT(%reg)
where EBX register isn't required as GOT base.
Since direct call is 4-byte long and indirect call, is 5-byte long, the
extra one byte must be handled properly.
For general dynamic model, 7-byte lea instruction before call
instruction is replaced by 6-byte one to make room for indirect call.
For local dynamic model, we simply use 5-byte indirect call.
TLS linker optimization is updated to recognize new instruction
patterns. For local dynamic model to local exec model transition,
we generate a 6-byte lea instruction as nop, instead of a 1-byte nop
plus a 4-byte lea instruction.
PR gold/20308
* i386.cc (Target_i386::Relocate::relocate): Allow
R_386_GOT32X relocation against ___tls_get_addr.
(Target_i386::Relocate::tls_gd_to_ie): Support indirect
call to __tls_get_addr.
(Target_i386::Relocate::tls_gd_to_le): Likewise.
(Target_i386::Relocate::tls_ld_to_le): Likewise.
* testsuite/Makefile.am (check_PROGRAMS): Add pr20308a_test,
pr20308b_test, pr20308c_test, pr20308d_test, pr20308e_test.
(pr20308a_test_SOURCES): New.
(pr20308a_test_DEPENDENCIES): Likewise.
(pr20308a_test_CFLAGS): Likewise.
(pr20308a_test_LDFLAGS): Likewise.
(pr20308a_test_LDADD): Likewise.
(pr20308b_test_SOURCES): Likewise.
(pr20308b_test_DEPENDENCIES): Likewise.
(pr20308b_test_CFLAGS): Likewise.
(pr20308b_test_LDFLAGS): Likewise.
(pr20308b_test_LDADD): Likewise.
(pr20308c_test_SOURCES): Likewise.
(pr20308c_test_DEPENDENCIES): Likewise.
(pr20308c_test_CFLAGS): Likewise.
(pr20308c_test_LDFLAGS): Likewise.
(pr20308c_test_LDADD): Likewise.
(pr20308d_test_SOURCES): Likewise.
(pr20308d_test_DEPENDENCIES): Likewise.
(pr20308d_test_CFLAGS): Likewise.
(pr20308d_test_LDFLAGS): Likewise.
(pr20308d_test_LDADD): Likewise.
(pr20308e_test_SOURCES): Likewise.
(pr20308e_test_DEPENDENCIES): Likewise.
(pr20308e_test_CFLAGS): Likewise.
(pr20308e_test_LDFLAGS): Likewise.
(pr20308e_test_LDADD): Likewise.
(pr20308a.so): Likewise.
(pr20308b.so): Likewise.
(pr20308_gd.o): Likewise.
(pr20308_ld.o): Likewise.
(MOSTLYCLEANFILES): Add pr20308a.so pr20308b.so.
* testsuite/Makefile.in: Regenerated.
* testsuite/pr20308_def.c: New file.
* testsuite/pr20308_gd.S: Likewise.
* testsuite/pr20308_ld.S: Likewise.
* testsuite/pr20308_main.c: Likewise.
Fix symbol values and relocation addends for relocatable links.
The fix for PR 19291 broke some other cases where -r is used with scripts,
as reported in PR 22266. The original fix for PR 22266 ended up breaking
many cases for REL targets, where the addends are stored in the section data,
and are not being adjusted properly.
The problem was basically that in a relocatable output file (ET_REL),
symbol values are supposed to be relative to the start address of their
section. Usually in a relocatable file, all sections start at 0, so the
failure to get this right is often irrelevant, but with a linker script,
we occasionally see an output section whose starting address is not 0,
and gold would occasionally write a symbol with its relocated value instead
of its section-relative value.
This patch reverts the recent fix for PR 22266 as well as my original fix
for PR 19291. The original fix moved the symbol value adjustment to
write_local_symbols, but neglected to undo a few places where the adjustment
was also being applied, resulting in an occasional double adjustment. The
more recent fix removed those other adjustments, but then failed to
re-account for the adjustment when rewriting the relocations on REL targets.
With the old attempts reverted, we now apply the symbol value adjustment to
the one case that had been missed (non-section symbols in merge sections).
But now we also need to account for the adjustment when rewriting the addends
for RELA relocations.
gold/
PR gold/19291
PR gold/22266
* object.cc (Sized_relobj_file::compute_final_local_value_internal):
Revert changes from 2017-11-08 patch. Adjust symbol value in
relocatable links for non-section symbols.
(Sized_relobj_file::compute_final_local_value): Revert changes from
2017-11-08 patch.
(Sized_relobj_file::do_finalize_local_symbols): Likewise.
(Sized_relobj_file::write_local_symbols): Revert changes from
2015-11-25 patch.
* object.h (Sized_relobj_file::compute_final_local_value_internal):
Revert changes from 2017-11-08 patch.
* powerpc.cc (Target_powerpc::relocate_relocs): Adjust addend for
relocatable links.
* target-reloc.h (relocate_relocs): Adjust addend for relocatable links.
* testsuite/pr22266_a.c (hello): New function.
* testsuite/pr22266_main.c (main): Add test for merge sections.
* testsuite/pr22266_script.t: Add rule for .rodata.
Fix symbol values and relocation addends for relocatable links.
The fix for PR 19291 broke some other cases where -r is used with scripts,
as reported in PR 22266. The original fix for PR 22266 ended up breaking
many cases for REL targets, where the addends are stored in the section data,
and are not being adjusted properly.
The problem was basically that in a relocatable output file (ET_REL),
symbol values are supposed to be relative to the start address of their
section. Usually in a relocatable file, all sections start at 0, so the
failure to get this right is often irrelevant, but with a linker script,
we occasionally see an output section whose starting address is not 0,
and gold would occasionally write a symbol with its relocated value instead
of its section-relative value.
This patch reverts the recent fix for PR 22266 as well as my original fix
for PR 19291. The original fix moved the symbol value adjustment to
write_local_symbols, but neglected to undo a few places where the adjustment
was also being applied, resulting in an occasional double adjustment. The
more recent fix removed those other adjustments, but then failed to
re-account for the adjustment when rewriting the relocations on REL targets.
With the old attempts reverted, we now apply the symbol value adjustment to
the one case that had been missed (non-section symbols in merge sections).
But now we also need to account for the adjustment when rewriting the addends
for RELA relocations.
gold/
PR gold/19291
PR gold/22266
* object.cc (Sized_relobj_file::compute_final_local_value_internal):
Revert changes from 2017-11-08 patch. Adjust symbol value in
relocatable links for non-section symbols.
(Sized_relobj_file::compute_final_local_value): Revert changes from
2017-11-08 patch.
(Sized_relobj_file::do_finalize_local_symbols): Likewise.
(Sized_relobj_file::write_local_symbols): Revert changes from
2015-11-25 patch.
* object.h (Sized_relobj_file::compute_final_local_value_internal):
Revert changes from 2017-11-08 patch.
* powerpc.cc (Target_powerpc::relocate_relocs): Adjust addend for
relocatable links.
* target-reloc.h (relocate_relocs): Adjust addend for relocatable links.
* testsuite/pr22266_a.c (hello): New function.
* testsuite/pr22266_main.c (main): Add test for merge sections.
* testsuite/pr22266_script.t: Add rule for .rodata.
Fix problem where mixed section types can cause internal error during a -r link.
During a -r (or --emit-relocs) link, if two sections had the same name but
different section types, gold would put relocations for both sections into
the same relocation section even though the data sections remained separate.
For .eh_frame sections, when one section is PROGBITS and another is
X86_64_UNWIND, we really should be using the UNWIND section type and
combining the sections anyway. For other sections, we should be
creating one relocation section for each output data section.
gold/
PR gold/23016
* incremental.cc (can_incremental_update): Check for unwind section
type.
* layout.h (Layout::layout): Add sh_type parameter.
* layout.cc (Layout::layout): Likewise.
(Layout::layout_reloc): Create new output reloc section if data
section does not already have one.
(Layout::layout_eh_frame): Check for unwind section type.
(Layout::make_eh_frame_section): Use unwind section type for .eh_frame
and .eh_frame_hdr.
* object.h (Sized_relobj_file::Shdr_write): New typedef.
(Sized_relobj_file::layout_section): Add sh_type parameter.
(Sized_relobj_file::Deferred_layout::Deferred_layout): Add sh_type
parameter.
* object.cc (Sized_relobj_file::check_eh_frame_flags): Check for
unwind section type.
(Sized_relobj_file::layout_section): Add sh_type parameter; pass it
to Layout::layout.
(Sized_relobj_file::do_layout): Make local copy of sh_type.
Force .eh_frame sections to unwind section type.
Pass sh_type to layout_section.
(Sized_relobj_file<size, big_endian>::do_layout_deferred_sections):
Pass sh_type to layout_section.
* output.cc (Output_section::Output_section): Initialize reloc_section_.
* output.h (Output_section::reloc_section): New method.
(Output_section::set_reloc_section): New method.
(Output_section::reloc_section_): New data member.
* target.h (Target::unwind_section_type): New method.
(Target::Target_info::unwind_section_type): New data member.
* aarch64.cc (aarch64_info): Add unwind_section_type.
* arm.cc (arm_info, arm_nacl_info): Likewise.
* i386.cc (i386_info, i386_nacl_info, iamcu_info): Likewise.
* mips.cc (mips_info, mips_nacl_info): Likewise.
* powerpc.cc (powerpc_info): Likewise.
* s390.cc (s390_info): Likewise.
* sparc.cc (sparc_info): Likewise.
* tilegx.cc (tilegx_info): Likewise.
* x86_64.cc (x86_64_info, x86_64_nacl_info): Likewise.
* testsuite/Makefile.am (pr23016_1, pr23016_2): New test cases.
* testsuite/Makefile.in: Regenerate.
* testsuite/testfile.cc: Add unwind_section_type.
* testsuite/pr23016_1.sh: New test script.
* testsuite/pr23016_1a.s: New source file.
* testsuite/pr23016_1b.s: New source file.
* testsuite/pr23016_2.sh: New test script.
* testsuite/pr23016_2a.s: New source file.
* testsuite/pr23016_2b.s: New source file.
Fix problem where mixed section types can cause internal error during a -r link.
During a -r (or --emit-relocs) link, if two sections had the same name but
different section types, gold would put relocations for both sections into
the same relocation section even though the data sections remained separate.
For .eh_frame sections, when one section is PROGBITS and another is
X86_64_UNWIND, we really should be using the UNWIND section type and
combining the sections anyway. For other sections, we should be
creating one relocation section for each output data section.
gold/
PR gold/23016
* incremental.cc (can_incremental_update): Check for unwind section
type.
* layout.h (Layout::layout): Add sh_type parameter.
* layout.cc (Layout::layout): Likewise.
(Layout::layout_reloc): Create new output reloc section if data
section does not already have one.
(Layout::layout_eh_frame): Check for unwind section type.
(Layout::make_eh_frame_section): Use unwind section type for .eh_frame
and .eh_frame_hdr.
* object.h (Sized_relobj_file::Shdr_write): New typedef.
(Sized_relobj_file::layout_section): Add sh_type parameter.
(Sized_relobj_file::Deferred_layout::Deferred_layout): Add sh_type
parameter.
* object.cc (Sized_relobj_file::check_eh_frame_flags): Check for
unwind section type.
(Sized_relobj_file::layout_section): Add sh_type parameter; pass it
to Layout::layout.
(Sized_relobj_file::do_layout): Make local copy of sh_type.
Force .eh_frame sections to unwind section type.
Pass sh_type to layout_section.
(Sized_relobj_file<size, big_endian>::do_layout_deferred_sections):
Pass sh_type to layout_section.
* output.cc (Output_section::Output_section): Initialize reloc_section_.
* output.h (Output_section::reloc_section): New method.
(Output_section::set_reloc_section): New method.
(Output_section::reloc_section_): New data member.
* target.h (Target::unwind_section_type): New method.
(Target::Target_info::unwind_section_type): New data member.
* aarch64.cc (aarch64_info): Add unwind_section_type.
* arm.cc (arm_info, arm_nacl_info): Likewise.
* i386.cc (i386_info, i386_nacl_info, iamcu_info): Likewise.
* mips.cc (mips_info, mips_nacl_info): Likewise.
* powerpc.cc (powerpc_info): Likewise.
* s390.cc (s390_info): Likewise.
* sparc.cc (sparc_info): Likewise.
* tilegx.cc (tilegx_info): Likewise.
* x86_64.cc (x86_64_info, x86_64_nacl_info): Likewise.
* testsuite/Makefile.am (pr23016_1, pr23016_2): New test cases.
* testsuite/Makefile.in: Regenerate.
* testsuite/testfile.cc: Add unwind_section_type.
* testsuite/pr23016_1.sh: New test script.
* testsuite/pr23016_1a.s: New source file.
* testsuite/pr23016_1b.s: New source file.
* testsuite/pr23016_2.sh: New test script.
* testsuite/pr23016_2a.s: New source file.
* testsuite/pr23016_2b.s: New source file.
Fix problem where mixed section types can cause internal error during a -r link.
During a -r (or --emit-relocs) link, if two sections had the same name but
different section types, gold would put relocations for both sections into
the same relocation section even though the data sections remained separate.
For .eh_frame sections, when one section is PROGBITS and another is
X86_64_UNWIND, we really should be using the UNWIND section type and
combining the sections anyway. For other sections, we should be
creating one relocation section for each output data section.
gold/
PR gold/23016
* incremental.cc (can_incremental_update): Check for unwind section
type.
* layout.h (Layout::layout): Add sh_type parameter.
* layout.cc (Layout::layout): Likewise.
(Layout::layout_reloc): Create new output reloc section if data
section does not already have one.
(Layout::layout_eh_frame): Check for unwind section type.
(Layout::make_eh_frame_section): Use unwind section type for .eh_frame
and .eh_frame_hdr.
* object.h (Sized_relobj_file::Shdr_write): New typedef.
(Sized_relobj_file::layout_section): Add sh_type parameter.
(Sized_relobj_file::Deferred_layout::Deferred_layout): Add sh_type
parameter.
* object.cc (Sized_relobj_file::check_eh_frame_flags): Check for
unwind section type.
(Sized_relobj_file::layout_section): Add sh_type parameter; pass it
to Layout::layout.
(Sized_relobj_file::do_layout): Make local copy of sh_type.
Force .eh_frame sections to unwind section type.
Pass sh_type to layout_section.
(Sized_relobj_file<size, big_endian>::do_layout_deferred_sections):
Pass sh_type to layout_section.
* output.cc (Output_section::Output_section): Initialize reloc_section_.
* output.h (Output_section::reloc_section): New method.
(Output_section::set_reloc_section): New method.
(Output_section::reloc_section_): New data member.
* target.h (Target::unwind_section_type): New method.
(Target::Target_info::unwind_section_type): New data member.
* aarch64.cc (aarch64_info): Add unwind_section_type.
* arm.cc (arm_info, arm_nacl_info): Likewise.
* i386.cc (i386_info, i386_nacl_info, iamcu_info): Likewise.
* mips.cc (mips_info, mips_nacl_info): Likewise.
* powerpc.cc (powerpc_info): Likewise.
* s390.cc (s390_info): Likewise.
* sparc.cc (sparc_info): Likewise.
* tilegx.cc (tilegx_info): Likewise.
* x86_64.cc (x86_64_info, x86_64_nacl_info): Likewise.
* testsuite/Makefile.am (pr23016_1, pr23016_2): New test cases.
* testsuite/Makefile.in: Regenerate.
* testsuite/testfile.cc: Add unwind_section_type.
* testsuite/pr23016_1.sh: New test script.
* testsuite/pr23016_1a.s: New source file.
* testsuite/pr23016_1b.s: New source file.
* testsuite/pr23016_2.sh: New test script.
* testsuite/pr23016_2a.s: New source file.
* testsuite/pr23016_2b.s: New source file.
Fix problem where mixed section types can cause internal error during a -r link.
During a -r (or --emit-relocs) link, if two sections had the same name but
different section types, gold would put relocations for both sections into
the same relocation section even though the data sections remained separate.
For .eh_frame sections, when one section is PROGBITS and another is
X86_64_UNWIND, we really should be using the UNWIND section type and
combining the sections anyway. For other sections, we should be
creating one relocation section for each output data section.
gold/
PR gold/23016
* incremental.cc (can_incremental_update): Check for unwind section
type.
* layout.h (Layout::layout): Add sh_type parameter.
* layout.cc (Layout::layout): Likewise.
(Layout::layout_reloc): Create new output reloc section if data
section does not already have one.
(Layout::layout_eh_frame): Check for unwind section type.
(Layout::make_eh_frame_section): Use unwind section type for .eh_frame
and .eh_frame_hdr.
* object.h (Sized_relobj_file::Shdr_write): New typedef.
(Sized_relobj_file::layout_section): Add sh_type parameter.
(Sized_relobj_file::Deferred_layout::Deferred_layout): Add sh_type
parameter.
* object.cc (Sized_relobj_file::check_eh_frame_flags): Check for
unwind section type.
(Sized_relobj_file::layout_section): Add sh_type parameter; pass it
to Layout::layout.
(Sized_relobj_file::do_layout): Make local copy of sh_type.
Force .eh_frame sections to unwind section type.
Pass sh_type to layout_section.
(Sized_relobj_file<size, big_endian>::do_layout_deferred_sections):
Pass sh_type to layout_section.
* output.cc (Output_section::Output_section): Initialize reloc_section_.
* output.h (Output_section::reloc_section): New method.
(Output_section::set_reloc_section): New method.
(Output_section::reloc_section_): New data member.
* target.h (Target::unwind_section_type): New method.
(Target::Target_info::unwind_section_type): New data member.
* aarch64.cc (aarch64_info): Add unwind_section_type.
* arm.cc (arm_info, arm_nacl_info): Likewise.
* i386.cc (i386_info, i386_nacl_info, iamcu_info): Likewise.
* mips.cc (mips_info, mips_nacl_info): Likewise.
* powerpc.cc (powerpc_info): Likewise.
* s390.cc (s390_info): Likewise.
* sparc.cc (sparc_info): Likewise.
* tilegx.cc (tilegx_info): Likewise.
* x86_64.cc (x86_64_info, x86_64_nacl_info): Likewise.
* testsuite/Makefile.am (pr23016_1, pr23016_2): New test cases.
* testsuite/Makefile.in: Regenerate.
* testsuite/testfile.cc: Add unwind_section_type.
* testsuite/pr23016_1.sh: New test script.
* testsuite/pr23016_1a.s: New source file.
* testsuite/pr23016_1b.s: New source file.
* testsuite/pr23016_2.sh: New test script.
* testsuite/pr23016_2a.s: New source file.
* testsuite/pr23016_2b.s: New source file.
Fix problems with bss handling in linker scripts.
PR 16711 noted that gold allocates file space for BSS sections when using
a linker script. I've fixed that by rewriting set_section_addresses and
set_section_list_addresses to track the file offset separate from the
current virtual address, so that BSS sections do not move the file offset.
Now, if a series of BSS sections come at the end of a segment, we do not
allocate file space; but if a script forces them into the middle of a
segment, we will still allocate file space (matching Gnu ld behavior).
I've also added a warning when that happens.
That exposed another problem where orphan .bss sections were sometimes
placed in the middle of a segment. For example, if the script mentions
the .got section, but both .data and .bss are orphans, gold would put
both .data and .bss in front of .got. I've fixed that by ensuring that
orphan BSS sections are always placed after all other allocated sections.
It also exposed a problem where the SUBALIGN property is not handled
properly. The ld manual clearly states that it should override input section
alignment, whether greater or less than the given alignment, but gold would
only increase an input section's alignment. Gold would also place the output
section based on its original alignment before the SUBALIGN property took
effect, leading to a misaligned output section (where the input section
was properly aligned in memory, but was not aligned relative to the start
of the section), in violation of the ELF/gABI spec. I've fixed that by
making sure that the SUBALIGN property overrides the internal alignment of
the input sections as well as the external alignment of the output section.
This affected the behavior of script_test_2, which was written to expect
a misaligned section.
The net effect is, I think, improved compatibility with the BFD linker.
There are still cases where orphan placement differs, but the differences
should be rarer and less important. ALIGN and SUBALIGN behavior is closer,
but still not an exact match -- I still found cases where ld would create
a misaligned output section, and where gold will properly align it.
gold/
PR gold/16711
* output.cc (Output_section::set_final_data_size): Calculate data size
based on relative offset rather than file offset.
(Output_segment::set_section_addresses): Track file offset separately
from address offset.
(Output_segment::set_section_list_addresses): Add pfoff parameter.
Track file offset separately. Don't move file offset for BSS
sections.
* output.h (Output_segment::set_section_list_addresses): Add pfoff
parameter.
* script-sections.cc (Orphan_section_placement): Add PLACE_LAST_ALLOC.
(Orphan_section_placement::Orphan_section_placement): Initialize it.
(Orphan_section_placement::output_section_init): Track last allocated
section.
(Orphan_section_placement::find_place): Place BSS after last allocated
section.
(Output_section_element_input::set_section_addresses): Always override
input section alignment when SUBALIGN is specified.
(Output_section_definition::set_section_addresses): Override alignment
of output section when SUBALIGN is specified.
* testsuite/Makefile.am (script_test_15a, script_test_15b)
(script_test_15c): New test cases.
* testsuite/Makefile.in: Regenerate.
* testsuite/script_test_2.cc: Adjust expected layout.
* testsuite/script_test_15.c: New source file.
* testsuite/script_test_15a.sh: New shell script.
* testsuite/script_test_15a.t: New linker script.
* testsuite/script_test_15b.sh: New shell script.
* testsuite/script_test_15b.t: New linker script.
* testsuite/script_test_15c.sh: New shell script.
* testsuite/script_test_15c.t: New linker script.
Handle stack split for x32
X32 uses cmp %fs:NN,%esp, lea NN(%rsp),%r10d, lea NN(%rsp),%r11d,
instead of cmp %fs:NN,%rsp, lea NN(%rsp),%r10, lea NN(%rsp),%r11.
This patch handles it.
PR gold/17729
* configure.ac (DEFAULT_TARGET_X86_64): Don't set for x32.
(DEFAULT_TARGET_X32): Set for x32.
* x86_64.cc (cmp_insn_32): New.
(lea_r10_insn_32): Likewise.
(lea_r11_insn_32): Likewise.
(cmp_insn_64): Likewise.
(lea_r10_insn_64): Likewise.
(lea_r11_insn_64): Likewise.
(Target_x86_64<size>::do_calls_non_split): Handle x32.
* testsuite/Makefile.am (check_SCRIPTS): Add split_x32.sh.
(check_DATA): Add split_x32 files.
(split_x32_[1234n].o): New targets.
(split_x32_[124]): New targets.
(split_x32_[1234r].stdout): New targets.
* testsuite/split_x32.sh: New file.
* testsuite/split_x32_1.s: Likewise.
* testsuite/split_x32_2.s: Likewise.
* testsuite/split_x32_3.s: Likewise.
* testsuite/split_x32_4.s: Likewise.
* testsuite/split_x32_n.s: Likewise.
* configure: Regenerated.
* testsuite/Makefile.in: Likewise.
Handle stack split for x32
X32 uses cmp %fs:NN,%esp, lea NN(%rsp),%r10d, lea NN(%rsp),%r11d,
instead of cmp %fs:NN,%rsp, lea NN(%rsp),%r10, lea NN(%rsp),%r11.
This patch handles it.
PR gold/17729
* configure.ac (DEFAULT_TARGET_X86_64): Don't set for x32.
(DEFAULT_TARGET_X32): Set for x32.
* x86_64.cc (cmp_insn_32): New.
(lea_r10_insn_32): Likewise.
(lea_r11_insn_32): Likewise.
(cmp_insn_64): Likewise.
(lea_r10_insn_64): Likewise.
(lea_r11_insn_64): Likewise.
(Target_x86_64<size>::do_calls_non_split): Handle x32.
* testsuite/Makefile.am (check_SCRIPTS): Add split_x32.sh.
(check_DATA): Add split_x32 files.
(split_x32_[1234n].o): New targets.
(split_x32_[124]): New targets.
(split_x32_[1234r].stdout): New targets.
* testsuite/split_x32.sh: New file.
* testsuite/split_x32_1.s: Likewise.
* testsuite/split_x32_2.s: Likewise.
* testsuite/split_x32_3.s: Likewise.
* testsuite/split_x32_4.s: Likewise.
* testsuite/split_x32_n.s: Likewise.
* configure: Regenerated.
* testsuite/Makefile.in: Likewise.
Handle stack split for x32
X32 uses cmp %fs:NN,%esp, lea NN(%rsp),%r10d, lea NN(%rsp),%r11d,
instead of cmp %fs:NN,%rsp, lea NN(%rsp),%r10, lea NN(%rsp),%r11.
This patch handles it.
PR gold/17729
* configure.ac (DEFAULT_TARGET_X86_64): Don't set for x32.
(DEFAULT_TARGET_X32): Set for x32.
* x86_64.cc (cmp_insn_32): New.
(lea_r10_insn_32): Likewise.
(lea_r11_insn_32): Likewise.
(cmp_insn_64): Likewise.
(lea_r10_insn_64): Likewise.
(lea_r11_insn_64): Likewise.
(Target_x86_64<size>::do_calls_non_split): Handle x32.
* testsuite/Makefile.am (check_SCRIPTS): Add split_x32.sh.
(check_DATA): Add split_x32 files.
(split_x32_[1234n].o): New targets.
(split_x32_[124]): New targets.
(split_x32_[1234r].stdout): New targets.
* testsuite/split_x32.sh: New file.
* testsuite/split_x32_1.s: Likewise.
* testsuite/split_x32_2.s: Likewise.
* testsuite/split_x32_3.s: Likewise.
* testsuite/split_x32_4.s: Likewise.
* testsuite/split_x32_n.s: Likewise.
* configure: Regenerated.
* testsuite/Makefile.in: Likewise.
Handle stack split for x32
X32 uses cmp %fs:NN,%esp, lea NN(%rsp),%r10d, lea NN(%rsp),%r11d,
instead of cmp %fs:NN,%rsp, lea NN(%rsp),%r10, lea NN(%rsp),%r11.
This patch handles it.
PR gold/17729
* configure.ac (DEFAULT_TARGET_X86_64): Don't set for x32.
(DEFAULT_TARGET_X32): Set for x32.
* x86_64.cc (cmp_insn_32): New.
(lea_r10_insn_32): Likewise.
(lea_r11_insn_32): Likewise.
(cmp_insn_64): Likewise.
(lea_r10_insn_64): Likewise.
(lea_r11_insn_64): Likewise.
(Target_x86_64<size>::do_calls_non_split): Handle x32.
* testsuite/Makefile.am (check_SCRIPTS): Add split_x32.sh.
(check_DATA): Add split_x32 files.
(split_x32_[1234n].o): New targets.
(split_x32_[124]): New targets.
(split_x32_[1234r].stdout): New targets.
* testsuite/split_x32.sh: New file.
* testsuite/split_x32_1.s: Likewise.
* testsuite/split_x32_2.s: Likewise.
* testsuite/split_x32_3.s: Likewise.
* testsuite/split_x32_4.s: Likewise.
* testsuite/split_x32_n.s: Likewise.
* configure: Regenerated.
* testsuite/Makefile.in: Likewise.
Handle stack split for x32
X32 uses cmp %fs:NN,%esp, lea NN(%rsp),%r10d, lea NN(%rsp),%r11d,
instead of cmp %fs:NN,%rsp, lea NN(%rsp),%r10, lea NN(%rsp),%r11.
This patch handles it.
PR gold/17729
* configure.ac (DEFAULT_TARGET_X86_64): Don't set for x32.
(DEFAULT_TARGET_X32): Set for x32.
* x86_64.cc (cmp_insn_32): New.
(lea_r10_insn_32): Likewise.
(lea_r11_insn_32): Likewise.
(cmp_insn_64): Likewise.
(lea_r10_insn_64): Likewise.
(lea_r11_insn_64): Likewise.
(Target_x86_64<size>::do_calls_non_split): Handle x32.
* testsuite/Makefile.am (check_SCRIPTS): Add split_x32.sh.
(check_DATA): Add split_x32 files.
(split_x32_[1234n].o): New targets.
(split_x32_[124]): New targets.
(split_x32_[1234r].stdout): New targets.
* testsuite/split_x32.sh: New file.
* testsuite/split_x32_1.s: Likewise.
* testsuite/split_x32_2.s: Likewise.
* testsuite/split_x32_3.s: Likewise.
* testsuite/split_x32_4.s: Likewise.
* testsuite/split_x32_n.s: Likewise.
* configure: Regenerated.
* testsuite/Makefile.in: Likewise.
2010-02-21 Doug Kwan <dougkwan@google.com>
* arm.cc (Arm_relocate_functions::arm_branch_common): Fix bug in
handling of the maximum backward branch offset.
(Arm_relocate_functions::thumb_branch_common): Ditto.
* testsuite/Makefile.am (check_SCRIPTS): Add arm_branch_in_range.sh.
(check_DATA): Add arm_bl_in_range.stdout, arm_bl_out_of_range.stdout
thumb_bl_in_range.stdout, thumb_bl_out_of_range.stdout,
thumb2_bl_in_range.stdout and thumb2_bl_out_of_range.stdout.
(arm_bl_in_range.stdout, arm_bl_in_range, arm_bl_in_range.o,
arm_bl_out_of_range.stdout, arm_bl_out_of_range,
arm_bl_out_of_range.o, thumb_bl_in_range.stdout, thumb_bl_in_range,
thumb_bl_in_range.o, thumb_bl_out_of_range.stdout,
thumb_bl_out_of_range thumb_bl_out_of_range.o,
thumb2_bl_in_range.stdout, thumb2_bl_in_range, thumb2_bl_in_range.o
thumb2_bl_out_of_range.stdout, thumb2_bl_out_of_range,
thumb2_bl_out_of_range.o): New rules.
(MOSTLYCLEANFILES): Add arm_bl_in_range, arm_bl_out_of_range,
thumb_bl_in_range, thumb_bl_out_of_range, thumb2_bl_in_range and
thumb2_bl_out_of_range
* testsuite/Makefile.in: Regenerate.
* testsuite/arm_bl_in_range.s: New file.
* testsuite/arm_bl_out_of_range.s: Ditto.
* testsuite/arm_branch_in_range.sh: Ditto.
* testsuite/arm_branch_range.t: Ditto.
* testsuite/thumb2_branch_range.t: Ditto.
* testsuite/thumb_bl_in_range.s: Ditto.
* testsuite/thumb_bl_out_of_range.s: Ditto.
* testsuite/thumb_branch_range.t: Ditto.
2010-03-22 Doug Kwan <dougkwan@google.com>
* arm.cc (Arm_relocate_functions::abs8,
Arm_relocate_functions::abs16): Use correct check for overflow
specified in the ARM ELF specs.
(Arm_relocate_functions): thumb_branch_common. Handle bit 1 of branch
target of a BLX instruction specially.
(Reloc_stub::stub_type_for_reloc): Ditto.
(Relocate::relocate): Use symbolic names instead of numeric relocation
codes to report error.
(Target_arm::do_relox): Reduce default stub-group size for Cortex-A8
workaround.
* testsuite/Makefile.am (check_DATA): add thumb_blx_in_range.stdout,
thumb_blx_out_of_range.stdout, thumb2_blx_in_range.stdout and
thumb2_blx_out_of_range.stdout
(thumb_bl_out_of_range, thumb_bl_out_of_range.o,
thumb2_bl_out_of_range, thumb2_bl_out_of_range.o): Fix dependenices.
(thumb_blx_in_range.stdout, thumb_blx_in_range, thumb_blx_in_range.o,
thumb_blx_out_of_range.stdout, thumb_blx_out_of_range,
thumb_blx_out_of_range.o, thumb2_blx_in_range.stdout,
thumb2_blx_in_range, thumb2_blx_in_range.o,
thumb2_blx_out_of_range.stdout, thumb2_blx_out_of_range,
thumb2_blx_out_of_range.o): New rules.
(MOSTLYCLEANFILES): Add thumb_blx_in_range, thumb_blx_out_of_range,
thumb2_blx_in_range and thumb2_blx_out_of_range.
* testsuite/Makefile.in: Regenerate.
* arm_branch_in_range.sh: Add tests for THUMB BLX.
* testsuite/thumb_blx_in_range.s: New file.
* testsuite/thumb_blx_out_of_range.s: New file.
Fix symbol versioning problems in PR 18703.
If a symbol is defined with ".symver foo,foo@VER", the assembler
creates two symbols in the object: one unversioned, and one with
the (non-default) version "VER". If foo is listed in a version
script, gold would then make the first of those symbols the
default version, and would ignore the second symbol as a
duplicate, without making it a non-default version. While this is
arguably reasonable behavior, it doesn't match Gnu ld behavior,
so this patch fixes that by allowing the second definition to
override the first by resetting the "default version" indication.
Several test cases from the Gnu ld testsuite also exposed another
related problem, where a symbol defined with ".symver foo,foo@",
placed into a shared library, is not handled properly by gold.
This patch also fixes that case, binding the symbol to the base
version.
gold/
PR gold/18703
* dynobj.cc (Versions::record_version): Handle symbol defined with
base version.
(Versions::symbol_section_contents): Likewise.
* symtab.h (Symbol::set_is_not_default): New class method.
(Symbol_table::resolve): Add is_default_version parameter.
(Symbol_table::should_override): Likewise.
* resolve.cc (Symbol_table::resolve): Add is_default_version parameter,
and pass to should_override. Adjust all callers and explicit
instantiations.
(Symbol_table::should_override): Add is_default_value parameter;
allow default version in a dynamic object to override existing
definition from same object.
* symtab.cc (Symbol_table::add_from_object): Handle case where same
symbol is defined as unversioned and non-default version in the same
object.
* testsuite/Makefile.am (ver_test_13): New test case.
* testsuite/Makefile.in: Regenerate.
* testsuite/ver_test_4.cc: Add test for symbol with base version.
* testsuite/ver_test_4.sh: Likewise.
* testsuite/ver_test_13.c: New source file.
* testsuite/ver_test_13.script: New version script.
* testsuite/ver_test_13.sh: New test case.
Fix symbol versioning problems in PR 18703.
If a symbol is defined with ".symver foo,foo@VER", the assembler
creates two symbols in the object: one unversioned, and one with
the (non-default) version "VER". If foo is listed in a version
script, gold would then make the first of those symbols the
default version, and would ignore the second symbol as a
duplicate, without making it a non-default version. While this is
arguably reasonable behavior, it doesn't match Gnu ld behavior,
so this patch fixes that by allowing the second definition to
override the first by resetting the "default version" indication.
Several test cases from the Gnu ld testsuite also exposed another
related problem, where a symbol defined with ".symver foo,foo@",
placed into a shared library, is not handled properly by gold.
This patch also fixes that case, binding the symbol to the base
version.
gold/
PR gold/18703
* dynobj.cc (Versions::record_version): Handle symbol defined with
base version.
(Versions::symbol_section_contents): Likewise.
* symtab.h (Symbol::set_is_not_default): New class method.
(Symbol_table::resolve): Add is_default_version parameter.
(Symbol_table::should_override): Likewise.
* resolve.cc (Symbol_table::resolve): Add is_default_version parameter,
and pass to should_override. Adjust all callers and explicit
instantiations.
(Symbol_table::should_override): Add is_default_value parameter;
allow default version in a dynamic object to override existing
definition from same object.
* symtab.cc (Symbol_table::add_from_object): Handle case where same
symbol is defined as unversioned and non-default version in the same
object.
* testsuite/Makefile.am (ver_test_13): New test case.
* testsuite/Makefile.in: Regenerate.
* testsuite/ver_test_4.cc: Add test for symbol with base version.
* testsuite/ver_test_4.sh: Likewise.
* testsuite/ver_test_13.c: New source file.
* testsuite/ver_test_13.script: New version script.
* testsuite/ver_test_13.sh: New test case.