Add M5PM1 PY32 register map table
Introspection descriptor table for the M5StickC Plus S3's custom
PY32-based M5PM1 PMIC (I2C 0x6E), feeding the generic regmap engine.
The M5PM1 has no public datasheet. Every entry is confirmed against the
repo's hardware-validated py32_pmic_regs.h / py32_pmic.cpp (mirrored from
M5GFX board_M5StickS3), independently cross-checked against Espressif's
esp-claw StickS3 power_manager.c (0x09 I2C config, 0x10/0x11/0x13/0x16
GPIO block, PYG2/PYG3 rail masks) and M5Stack docs (PYG0..PYG4 mapping).
Field tables only where the bit layout is hardware-confirmed; everything
else is prose. Criticals flag rail/power-off/timed-power-on/download-lock
registers (0x06, 0x07, 0x0C, 0x10/0x11/0x13/0x16, 0x3C, 0x3D, 0x49, 0x4A).
py32_pmic.cpp now registers the table after ready_ = true and logs the
DeviceId/Model identity bytes (previously read but discarded); boot is
not gated on them. Native test mirrors test_axp192_regmap: validator,
floor >= 20, anchors, criticals, no-truncation sweep.
Claude-Session: https://claude.ai/code/session_01Ciw3Ea5Bb2YAcmuZ1dywRY